VON NEUMANN J. First Draft of a Report on the EDVAC[J]. IEEE Annals of the History of Computing, 1993, 15(4): 27-75. doi: 10.1109/85.238389
GOLDSTINE H H. The Computer from Pascal to Von Neumann[M]. Princeton: Princeton University Press, 1993.
VON NEUMANN J, KURZWEIL R. The Computer and the Brain[M]. Connecticut: Yale University Press, 2012.
ASPRAY W. John Von Neumann and the Origins of Modern Computing[M]. Cambridge: Mit Press, 1990.
SMITH L S, HAMILTON A. Neuromorphic Systems: Engineering Silicon from Neurobiology[M]. Singapore: World Scientific, 1998.
WINSTON P H. Artificial Intelligence[M]. New Jersey: Addison-Wesley Longman, 1984.
MISRA J. Artificial Neural Networks in Hardware: a Survey of Two Decades of Progress[J]. Neurocomputing, 2010, 74(1-3): 239-255. doi: 10.1016/j.neucom.2010.03.021
SHASTRI B J, TAIT A N, FERREIRA DE LIMA T, et al. Photonics for Artificial Intelligence and Neuromorphic Computing[J]. Nature Photonics, 2021, 15(2): 102-114. doi: 10.1038/s41566-020-00754-y
苏盈盈, 李太福, 康东帅, 等. 多层线性神经网络与单层线性神经网络的等效性研究[J]. 西南师范大学学报(自然科学版), 2017, 42(12): 105-112.
VOURKAS I, SIRAKOULIS G C. Emerging Memristor-Based Logic Circuit Design Approaches: a Review[J]. IEEE Circuits and Systems Magazine, 2016, 16(3): 15-30. doi: 10.1109/MCAS.2016.2583673
KONG L G, CHEN Y, LIU Y. Recent Progresses of NMOS and CMOS Logic Functions Based on Two-Dimensional Semiconductors[J]. Nano Research, 2021, 14(6): 1768-1783. doi: 10.1007/s12274-020-2958-7
YING Z F, FENG C H, ZHAO Z, et al. Electronic-Photonic Arithmetic Logic Unit for High-Speed Computing[J]. Nature Communications, 2020, 11: 2154. doi: 10.1038/s41467-020-16057-3
WANG X Y, DONG C T, WU Z R, et al. A Review on the Design of Ternary Logic Circuits[J]. Chinese Physics B, 2021, 30(12): 128402. doi: 10.1088/1674-1056/ac248b
BAKER R J. CMOS: Circuit Design, Layout, and Simulation[M]. New Jersey: John Wiley & Sons, 2019.
KARIMI A, et al. A Novel Design for Ultra-Low Power Pulse-Triggered D-Flip-Flop with Optimized Leakage Power[J]. Integration, 2018, 60: 160-166.
王廷江. 基于荷控忆阻器的蔡氏对偶混沌电路分析[J]. 西南大学学报(自然科学版), 2016, 38(4): 144-149.
SASIKUMAR R, LENIN K. Assessing the Influence of Hand-Arm Posture on Mechanical Responses of the Human Hand during Drilling Operation[J]. The International Journal of Advanced Manufacturing Technology, 2017, 93(1-4): 375-384. doi: 10.1007/s00170-016-9470-y
CHUA L. Memristor-the Missing Circuit Element[J]. IEEE Transactions on Circuit Theory, 1971, 18(5): 507-519. doi: 10.1109/TCT.1971.1083337
STRUKOV D B, SNIDER G S, STEWART D R, et al. The Missing Memristor Found[J]. Nature, 2008, 453(7191): 80-83. doi: 10.1038/nature06932
YANG L. A Memristor-Based Neural Network Circuit with Synchronous Weight Adjustment[J]. Neurocomputing, 2019, 363: 114-124. doi: 10.1016/j.neucom.2019.06.048
KIM Y S, AN J, JEON J B, et al. Ternary Logic with Stateful Neural Networks Using a Bilayered TaOX-Based Memristor Exhibiting Ternary States[J]. Advanced Science (Weinheim, Baden-Wurttemberg, Germany), 2022, 9(5): e2104107.
吴洁宁, 闫登卫, 王丽丹, 等. 基于忆阻器的细胞神经网络及在图像处理中的应用[J]. 西南师范大学学报(自然科学版), 2022, 47(3): 1-8.
HOFFER B, RANA V, MENZEL S, et al. Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)[J]. IEEE Transactions on Electron Devices, 2020, 67(8): 3115-3122. doi: 10.1109/TED.2020.3001247
XU N, PARK T G, KIM H J, et al. A Stateful Logic Family Based on a New Logic Primitive Circuit Composed of Two Antiparallel Bipolar Memristors[J]. Advanced Intelligent Systems, 2020, 2(1): 1900082. doi: 10.1002/aisy.201900082
LIU B, ZHAO Y D, VERMA D, et al. Bi2O2Se-Based Memristor-Aided Logic[J]. ACS Applied Materials & Interfaces, 2021, 13(13): 15391-15398.
WU Z X, ZHANG Y J, DU S M, et al. A Three-Valued Adder Circuit Implemented in ZnO Memristor with Multi-Resistance States[C]//2021 IEEE 14th International Conference on ASIC. New York: IEEE Press, 2021: 1-3.
KIM K M, WILLIAMS R S. A Family of Stateful Memristor Gates for Complete Cascading Logic[J]. IEEE Transactions on Circuits and Systems Ⅰ: Regular Papers, 2019, 66(11): 4348-4355. doi: 10.1109/TCSI.2019.2926811
YUAN R, MA M Y, XU L Y, et al. Efficient 16 Boolean Logic and Arithmetic Based on Bipolar Oxide Memristors[J]. Science China Information Sciences, 2020, 63(10): 1-8.
HU S Y, LI Y, CHENG L, et al. Reconfigurable Boolean Logic in Memristive Crossbar: The Principle and Implementation[J]. IEEE Electron Device Letters, 2019, 40(2): 200-203. doi: 10.1109/LED.2018.2886364
KIM W, MENZEL S, WOUTERS D J, et al. Impact of Oxygen Exchange Reaction at the Ohmic Interface in Ta2O5-Based ReRAM Devices[J]. Nanoscale, 2016, 8(41): 17774-17781. doi: 10.1039/C6NR03810G
VOURKAS I, SIRAKOULIS G C. A Novel Design and Modeling Paradigm for Memristor-Based Crossbar Circuits[J]. IEEE Transactions on Nanotechnology, 2012, 11(6): 1151-1159. doi: 10.1109/TNANO.2012.2217153
KVATINSKY S, FRIEDMAN E G, KOLODNY A, et al. TEAM: ThrEshold Adaptive Memristor Model[J]. IEEE Transactions on Circuits and Systems Ⅰ: Regular Papers, 2013, 60(1): 211-221. doi: 10.1109/TCSI.2012.2215714
KVATINSKY S, RAMADAN M, FRIEDMAN E G, et al. VTEAM: a General Model for Voltage-Controlled Memristors[J]. IEEE Transactions on Circuits and Systems Ⅱ: Express Briefs, 2015, 62(8): 786-790. doi: 10.1109/TCSII.2015.2433536
PERSHIN Y V. A Demonstration of Implication Logic Based on Volatile (Diffusive) Memristors[J]. IEEE Transactions on Circuits and Systems Ⅱ: Express Briefs, 2019, 66(6): 1033-1037. doi: 10.1109/TCSII.2018.2873635
AMRANI E, DRORI A, KVATINSKY S. Logic Design with Unipolar Memristors[C]//2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). New York: IEEE Press, 2016: 26-28.
AN W, RUSSELL B. Principia Mathematica[M]. Cambridge: Cambridge Press, 1910.
徐建华, 张军. 自然语言中"真""假"的逻辑意义[J]. 渤海大学学报(哲学社会科学版), 1997, 19(2): 52-55.
BORGHETTI J, SNIDER G S, KUEKES P J, et al. 'Memristive'Switches Enable'Stateful'Logic Operations via Material Implication[J]. Nature, 2010, 464(7290): 873-876. doi: 10.1038/nature08940
LEHTONEN E, POIKONEN J, LAIHO M. Implication Logic Synthesis Methods for Memristors[C]//2012 IEEE International Symposium on Circuits and Systems. New York: IEEE Press, 2012: 2441-2444.
WANG H P, LIN C C, WU C C, et al. On Synthesizing Memristor-Based Logic Circuits with Minimal Operational Pulses[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018, 26(12): 2842-2852. doi: 10.1109/TVLSI.2018.2816023
高德志, 容源, 江先阳. 忆阻-CMOS混合模逆电路设计[J]. 信息技术, 2020, 44(4): 10-16, 22.
KVATINSKY S, BELOUSOV D, LIMAN S, et al. MAGIC-Memristor-Aided Logic[J]. IEEE Transactions on Circuits and Systems Ⅱ: Express Briefs, 2014, 61(11): 895-899. doi: 10.1109/TCSII.2014.2357292
钟悦航, 武继刚, 刘鹏, 等. 忆阻器的三值逻辑门和加法器设计[J]. 微电子学与计算机, 2021, 38(7): 60-66.
GUCKERT L, SWARTZLANDER E E. MAD Gates-Memristor Logic Design Using Driver Circuitry[J]. IEEE Transactions on Circuits and Systems Ⅱ: Express Briefs, 2017, 64(2): 171-175. doi: 10.1109/TCSII.2016.2551554
LUO L, DONG Z K, HU X F, et al. MTL: Memristor Ternary Logic Design[J]. International Journal of Bifurcation and Chaos, 2020, 30(15): 2050222. doi: 10.1142/S0218127420502223
KVATINSKY S, WALD N, SATAT G, et al. MRL-Memristor Ratioed Logic[C]//201213th International Workshop on Cellular Nanoscale Networks and their Applications. New York: IEEE Press, 2012: 1-6.
SINGH A. Memristor Based XNOR for High Speed Area Efficient 1-Bit Full Adder[C]//2017 International Conference on Computing, Communication and Automation (ICCCA). New York: IEEE Press, 2017: 1549-1553.
WANG X Y, ZHOU P F, ESHRAGHIAN J K, et al. High-Density Memristor-CMOS Ternary Logic Family[J]. IEEE Transactions on Circuits and Systems Ⅰ: Regular Papers, 2021, 68(1): 264-274.
SOLIMAN N S, et al. Memristor-CNTFET Based Ternary Logic Gates[J]. Microelectronics Journal, 2018, 72: 74-85.
KHALID M, SINGH J. Memristor Based Unbalanced Ternary Logic Gates[J]. Analog Integrated Circuits and Signal Processing, 2016, 87(3): 399-406.
杨辉, 段书凯, 董哲康, 等. 基于忆阻器-CMOS的通用逻辑电路及其应用[J]. 中国科学: 信息科学, 2020, 50(2): 289-302.
AKERS S B. A Rectangular Logic Array[C]//12th Annual Symposium on Switching and Automata Theory. New York: IEEE Press, 1971: 79-90.
LEVY Y. Logic Operations in Memory Using a Memristive Akers Array[J]. Microelectronics Journal, 2014, 45(11): 1429-1437.
DONG Z K, HE Y F, HU X F, et al. Flexible Memristor-Based LUC and Its Network Integration for Boolean Logic Implementation[J]. IET Nanodielectrics, 2019, 2(2): 61-69.
SUN J W. Design and Implementation of Four-Color Conjecture Circuit Based on Memristor Neural Network[J]. AEU-International Journal of Electronics and Communications, 2022, 144: 154041.
YANG X H, ADEYEMO A, BALA A N, et al. Novel Memristive Logic Architectures[C]//201626th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS). New York: IEEE Press, 2016: 196-199.
ZHOU Y X, LI Y, XU L, et al. A Hybrid Memristor-CMOS XOR Gate for Nonvolatile Logic Computation[J]. Physica Status Solidi (a), 2016, 213(4): 1050-1054.
LIU G Z, ZHENG L J, WANG G Y, et al. A Carry Lookahead Adder Based on Hybrid CMOS-Memristor Logic Circuit[J]. IEEE Access, 7: 43691-43696.
SINGH T. Hybrid Memristor-CMOS (Memos) Based Logic Gates and Adder Circuits[EB/OL]. (2015-6-19)[2022-1-12]. https://arxiv.org/abs/1506.06735.
TEIMOORY M, AMIRSOLEIMANI A, AHMADI A, et al. A Hybrid Memristor-CMOS Multiplier Design Based on Memristive Universal Logic Gates[C]//2017 IEEE 60th International Midwest Symposium on Circuits and Systems. New York: IEEE Press, 2017: 1422-1425.
SINGH A. Design and Analysis of Memristor-Based Combinational Circuits[J]. IETE Journal of Research, 2020, 66(2): 182-191.
CHAKRABORTY A, DHARA A, RAHAMAN H. Design of Memristor-Based Up-down Counter Using Material Implication Logic[C]//2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI). New York: IEEE Press, 2016: 269-274.
TEIMOORY M, AMIRSOLEIMANI A, AHMADI A, et al. Memristor-Based Linear Feedback Shift Register Based on Material Implication Logic[C]//2015 European Conference on Circuit Theory and Design (ECCTD). New York: IEEE Press, 2015: 1-4.
CHEN Q, WANG X P, WAN H B, et al. A Logic Circuit Design for Perfecting Memristor-Based Material Implication[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017, 36(2): 279-284.
董哲康, 杜晨杰, 林辉品, 等. 基于多通道忆阻脉冲耦合神经网络的多帧图像超分辨率重建算法[J]. 电子与信息学报, 2020, 42(4): 835-843.
董哲康. 基于忆阻器的电路分析及其在神经形态系统中的应用[D]. 杭州: 浙江大学, 2019.
RAAIJMAKERS J G, SHIFFRIN R M. Search of Associative Memory[J]. Psychological Review, 1981, 88(2): 93-134.
SIEGEL S. Classical Conditioning, Drug Tolerance, and Drug Dependence[M]//Research Advances in Alcohol and Drug Problems. Berlin: Springer, 1983: 207-246.
SUN J W. Memristor-Based Neural Network Circuit of Pavlov Associative Memory with Dual Mode Switching[J]. AEU-International Journal of Electronics and Communications, 2021, 129: 153552.
DU S C. A Memristor-Based Circuit Design of Pavlov Associative Memory with Secondary Conditional Reflex and Its Application[J]. Neurocomputing, 2021, 463: 341-354.
董哲康, 钱智凯, 周广东, 等. 基于忆阻的全功能巴甫洛夫联想记忆电路的设计、实现与分析[J]. 电子与信息学报, 2022, 44(6): 2080-2092.
FENG Z. Hot News Mining and Public Opinion Guidance Analysis Based on Sentiment Computing in Network Social Media[J]. Personal and Ubiquitous Computing, 2019, 23(3): 373-381.
WANG L M. A New Emotion Model of Associative Memory Neural Network Based on Memristor[J]. Neurocomputing, 2020, 410: 83-92.
YANG L M. Emotion Model of Associative Memory Possessing Variable Learning Rates with Time Delay[J]. Neurocomputing, 2021, 460: 117-125.
SUN J W, HAN J T, WANG Y F, et al. Memristor-Based Neural Network Circuit of Emotion Congruent Memory with Mental Fatigue and Emotion Inhibition[J]. IEEE Transactions on Biomedical Circuits and Systems, 2021, 15(3): 606-616.
THEODORIDIS S, KOUTROUMBAS K. Introduction[M]//Pattern Recognition. Amsterdam: Elsevier, 2006: 1-11.
BOCKLISCH S F, BITTERLICH N. Fuzzy Pattern Classification-Methodology and Application-Fuzzy-Systems in Computer Science, 1994: 295-301.
杨乐. 面向联想记忆和模式识别的忆阻神经网络电路设计[D]. 武汉: 华中科技大学, 2019.
SHANG M J, WANG X P, LI M. A Memristor-Based Generalization and Differentiation Circuit Design and the Application in Recognition[C]//202039th Chinese Control Conference (CCC). New York: IEEE Press, 2020: 7206-7211.
WANG R, MU Z C, SUN H, et al. Dual-Mode Memristor Synaptic Circuit Design and Application in Image Processing[J]. Frontiers in Physics, 2021, 9: 690944.